Method for forming an anti-etching shielding layer of resist patterns in semiconductor fabrication

ABSTRACT

A method is disclosed for forming a photoresist pattern with enhanced etch resistance on a semiconductor substrate. A photoresist pattern is first formed on the substrate. A silicon-containing polymer layer is deposited over the photoresist pattern on the substrate. A thermal treatment is performed to form a cross-linked anti-etch shielding layer between the photoresist pattern and the silicon-containing layer. Then, the remaining silicon containing layer is removed. A plasma treatment is performed in order to increase an etch resistance of the cross-linked anti-etch shielding layer and the photoresist pattern.

CROSS REFERENCE

This is a continuation-in-part of U.S. patent application Ser. No.11/131,517, which was filed on Jun. 14,2005 and entitled “METHOD FORFORMING AN ANTI-ETCHING SHIELDING LAYER OF RESIST PATTERNS INSEMINCONDUCTOR FABRICATION.:

BACKGROUND

The present invention relates generally to semiconductor devices, andmore particularly, to the creation of fine granularity etch resistant(hard) masks for efficient sub-micron semiconductor devices fabrication.

As semiconductor devices develop into the sub-micron region and are morehighly integrated, interconnections and isolation widths required in themanufacturing processes have become very fine. In general, a finepattern is formed through a process including forming a resist patternby a photolithographic technique, and etching various underlying thinfilms through the resist pattern. The photolithographic techniqueincludes resist coating, mask alignment, exposure to light, anddevelopment. This technique has a limit due to the natural limitation ofthe wavelength of the exposing light. In other words, when using theconventional photolithographic technique, it is difficult to form acritical dimension of a fine resist pattern that exceeds the limit ofthe wavelength of the exposing light.

Furthermore, the conventional lithographic technique has difficulty incontrolling the etching resistance of a resist pattern, making itimpossible to fully control a surface profile. As such, the etchedpattern on a substrate is relatively rough, especially on the surfacesof the side walls of the etched patterns. As semiconductor fabricationprocesses delve into the sub-micron level, it is increasingly difficultto obtain fine granularity dimensions with the photolithographytechnique. Moreover, as the light source of photography shifts from KrFto ArF, new resist materials need to be developed accordingly. Becausemany ArF resist materials are very susceptible to the etching process,an anti-etching scheme is needed for the ArF resist materials that havea critical dimension less than 100 nm. In addition, the resist patternformed by conventional methods is further affected by the use of SEM Ebeam testing. The SEM E beam test is used for verification of thesemiconductor dimensions, but may cause shrinkage of the criticaldimensions.

Desirable in the art of sub-micron semiconductor device fabrication arenew fabrication methods that effectively create fine granularitysemiconductor dimensions and provide additional control of the etchresistance to the resist pattern layer.

SUMMARY

In view of the foregoing, a method is disclosed for forming aphotoresist pattern with enhanced etch resistance on a semiconductorsubstrate. A photoresist pattern is first formed on the substrate. Asilicon-containing polymer layer is deposited over the photoresistpattern on the substrate. A thermal treatment is performed to form across-linked anti-etch shielding layer between the photoresist patternand the silicon-containing layer. Then, the remaining silicon containinglayer is removed. A plasma treatment is performed in order to increasean etch resistance of the cross-linked anti-etch shielding layer and thephotoresist pattern.

The construction and method of operation of the invention, however,together with additional objects and advantages thereof will be bestunderstood from the following description of specific embodiments whenread in connection with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates a process for forming a photoresist layer, accordingto a conventional semiconductor fabrication method.

FIG. 2 illustrates a process for forming a fine hard mask forsemiconductor fabrication, in accordance with one embodiment of thepresent invention.

DESCRIPTION

This invention discloses a method for forming a hard mask with finepatterns on a semiconductor substrate. This invention utilizes asilicon-based water-soluble polymer material in place of a conventionalresist layer to create the fine resist pattern mask. The method alsoincorporates a radiation treatment to make the resist pattern of thehard mask more etch resistant, thereby providing additional protectionto the semiconductor structures during an etching process.

FIG. 1 illustrates a conventional process 100 for semiconductorfabrication. The conventional method utilizes the photolithographictechnique, which includes a step of exposure to light, to form a resistpattern. With this method, it has been difficult to form a fine resistpattern layer that exceeds the limit of the wavelength of the exposinglight. The fabrication steps 102 through 114 encompass the semiconductorfabrication process from the application of the first resist layer tothe completion of the semiconductor fabrication process.

Step 102 forms a first photoresist layer 116 on an ultra-pure substrate118 on a semiconductor wafer by a predetermined process, such asspinning-on coating. The first photoresist layer 116 is made of suchmaterials that are capable of generating acid substance when activatedby a thermal treatment.

Step 104 creates a first resist pattern 120 on the substrate 118 byexposing the first photoresist layer 116 to a radiation such as aparticular light through a pre-defined mask. The exposing light may be agray, deep UV light, KrF excimer laser beam, ArF excimer laser beam,electron beam, X-ray, etc., any of which has a wavelength correspondingto a sensitizing wavelength of the first photoresist layer.

Step 106 shows a plurality of acid bands 122 remaining around the firstphotoresist pattern 120 after the first photoresist layer 116 has beenpartially removed. The acid band is formed during the radiation processand comes from a predetermined photo mask material, which is decomposedas acid after exposure to light. If the acid concentration is higherthan a necessary threshold concentration, it dissolves the polymerduring a developing step. While the acid concentration is controlled tobe lower than the threshold, it would form the acid band and keep thepolymer photoresist pattern 120 within the acid band. The density ofthis acid band is very high which will contribute to a thickcross-linking layer as will be explained in step 110. After theformation of the acid bands 122, a post-developing baking may beimplemented (e.g., 60 to 120 degrees Celsius for 60 sec). This thermaltreatment affects a subsequent mixing reaction (step 110) and should bepreferably set at an appropriate temperature corresponding to thematerial type of first resist pattern 120.

Step 108 shows the forming of a second photoresist layer 124 onto thesemiconductor substrate 118. The second photoresist layer 124 iscomposed of a cross-linkable material capable of cross-linking in thepresence of acid. It can be dissolved in a solvent that is incapable ofdissolving the first resist acid. The second photoresist layer 124 maybe applied by a process, such as spray coating, spin coating, ordipping.

Step 110 thermally treats (e.g., mixing bake) the first photoresistpattern 120 and second photoresist layer 124 on the substrate 118 atabout 85 to 150 degrees Celsius for about 60 to 120 seconds. The thermaltreatment causes the acid to diffuse from the first photoresist pattern120 into the second photoresist layer 124, thereby forming across-linked layer 126 therebetween. It is understood that thecross-linked layer 126 where the reaction has occurred is formed in thesecond photoresist layer 124 and covers the first photoresist pattern120. It is also noted that the second photoresist layer 124 remainsunaffected by the acid reaction and therefore is a non cross-linked areathat will be removed in step 112.

Step 112 uses a liquid developer, such as water or an alkaline aqueoussolution (such as TMAH), to develop and remove the second photoresistlayer 124. The cross-linked area 126 is unaffected by this liquiddeveloper, and essentially becomes the combined cross-linked area 128.

Step 114 contains the remainder of the conventional semiconductorfabrication process steps necessary to complete a semiconductor device.These final steps include the conventional etching of the layers toremove where there is no resist pattern. This is accomplished by eitherwet or dry etching. A strip process is utilized to remove allphotoresist material. The final build of the source, drain, and gatestructures is accomplished and the electrical interconnects areincorporated by a metallization process.

In a conventional photolithographic technique, a typical resist layerused under a sub-193 nm radiation has poor etch resistance. Oneconventional method to increase the etch resistance of the resistpattern is to increase the thickness. However, this results in adecrease of effective depth of focus (DOF), a decrease in the processwindows, a decrease in the critical dimension (CD) or CD uniformity, adecrease in resist pattern adhesion and a decrease in the yieldstability. For example, the 0.3 um DOF window is hard to achieve for 65nm products with a photoresist thickness of 2,000 Angstroms. For a 193nm resist layer, the line end shortening after etch inspection (AEI) isworse than that of the 248 nm resist layer. Furthermore, the end to end,line end, or line to end dimension variation is difficult to correct byan optical proximity correction (OPC) method since the space betweenthese patterns is not adequate for OPC correction. A strong opticalproximity correction is required for the pattern correction; however,this may increase the complexity of the process. In addition, a betteretch resistance enhancement process is needed to correct this problem.But the small fence pattern between two adjacent contact holes ortrenches is hard to achieve by the conventional methods. After an etchinspection, the fence would peel, collapse, or be consumed during theetch process. Since a small hole or trench can only be achieved bysmaller wavelength equipment, if the desired fine resolution cannot beachieved by the existing equipment, a new smaller wavelength machine isrequired, which adds to the process equipment cost.

FIG. 2 presents a process 200 for forming an anti-etching shield layerin the resist patterns in accordance with one embodiment of the presentinvention. With reference to both FIGS. 1 and 2, the steps 102 through106 are identical to the conventional steps as explained in FIG. 1. Itis understood that acid atoms such as H+ are contained in the resistpattern.

Steps 202 and 204 replace steps 108 and 110 by utilizing a water-solublesilicon-based or silicon-containing polymer layer 206 in place of thesecond photoresist layer 124. The new process steps generate a resistpattern with an overall enhanced etch resistance that can be used tocreate fine granularity features needed for sub-micron semiconductordevices.

In step 202, the water soluble silicon-based polymer layer 206 isapplied over the silicon substrate 118 and the first photoresist layer120. This water-soluble silicon-based polymer layer 206 may containmaterials such as Si, Ti, Ta, Fluoride, Chloride, or double-bond ortriple-bond materials including benzyl or phenyl group polymers. It isunderstood that double bond polymers contain the double bond between twocarbon atoms, or a carbon and an oxygen atom. These bonds increase theetch resistance. Another similar bonding structure is silicon carbide,which can also be contained in the polymer. Some of these elements canalso be introduced to the photoresist layer 120 prior to or without thehelp of the deposition of the water soluble silicon-based polymer layer206. For example, Si, Ti, or Ta molecules can be doped into thephotoresist by implant methods or supercritical solvent such as C0 ₂ tointroduce the molecules into the photoresist.

It is noted that while this embodiment uses a water-solublesilicon-based polymer layer 206 as an example, other alternatives can beused. For example, other alcohol soluble polymer materials can also beused. As another example, the silicon-based polymer layer 206 can bereplaced with any polymer layer that contains metal materials, such asTi, Ta, W, Al, Cu or Co, or any Group IVA element of the chemistryperiodic table.

In step 204, the first photoresist pattern 120 and the water solublesilicon-based polymer layer 206 on the substrate 118 are thermallytreated at about 85 to 150 degrees Celsius. The thermal treatment causesthe acid atoms to diffuse from the first photoresist pattern 120 intothe water-soluble silicon-based polymer layer 206, which forms a secondlayer of polymer or a cross-linked anti-etching shielding layer 208therebetween. The cross-linked anti-etching shielding layer 208 wherethe reaction has occurred is formed in the water soluble silicon-basedpolymer layer 206, and covers the first photoresist pattern 120. Theanti-etching shielding layer is typically about 50 angstroms inthickness. It is understood that a large portion of the water-solublesilicon-based polymer layer 206 that is not cross-linked remainsunaffected by the acid reaction and will be removed in the step 112 by aliquid developer.

Step 112 is the conventional process step 112 as explained in FIG. 1. Inthis step, a liquid developer is applied to remove the non cross-linkedlayer of the water-soluble silicon-based polymer layer 206, but does notaffect the cross-linked layer 208. At this point, the first photoresistpattern 120 and the cross-linked layer 208 are formed together to createa combined resist pattern 210.

Step 212 may apply a new energy treatment such as a plasma treatment tothe combined resist pattern 210 to increase the resist pattern etchresistance in subsequent etching steps. The plasma treatment utilizesO₂, Ar, N₂, or H₂ gas plasma for treating the targeted resist pattern.The plasma treatment enhances the etch resistance of the resist patternfor future etching process. Thus, various types of openings such as theside wall 214 in this case will maintain their critical dimension afterthe etch process and the SEM E beam measurement. The critical dimensionhere refers to the minimal line or hole width of the resist pattern 210.In one embodiment of the present invention, the critical dimension ofthe resist pattern 210 can be less than about 100 nm.

The increased etch resistance due to the plasma treatment provides anumber of advantages. The CDU and process window are increased, therebyallowing the method to be less process dependent. The trench or hole CDis decreased allowing for finer granularity features necessary forsmaller nm semiconductor geometries. The ADI-AEI CD bias is reduced.With the higher etch resistance due to the plasma treatment, the CDshrinkage due to the SEM E beam testing will be reduced. Finally, sincethe plasma treatment allows for increased depth of focus (DOF), therequired resolution for photolithography of geometries are increased orin other words, less stringent.

Step 114 contains the remainder of the conventional semiconductorfabrication process steps necessary to complete a semiconductor device.These final steps include the conventional etching of the layers toremove the oxide coating where there is no resist pattern. This isaccomplished by either wet or dry etching. A strip process is utilizedto remove all photoresist material. The final build of the source,drain, and gate structures is accomplished and the electricalinterconnects are incorporated by a metallization process.

The present invention discloses a new fine granularity semiconductorfabrication process that increases (hardens) the resist pattern mask.The invention allows the use of water-soluble silicon-based polymermaterials on a substrate to provide fine granularity.

The above illustration provides many different embodiments orembodiments for implementing different features of the invention.Specific embodiments of components and processes are described to helpclarify the invention. These are, of course, merely embodiments and arenot intended to limit the invention from that described in the claims.

Although the invention is illustrated and described herein as embodiedin one or more specific examples, it is nevertheless not intended to belimited to the details shown, since various modifications and structuralchanges may be made therein without departing from the spirit of theinvention and within the scope and range of equivalents of the claims.Accordingly, it is appropriate that the appended claims be construedbroadly and in a manner consistent with the scope of the invention, asset forth in the following claims.

1. A method for forming an anti-etch shielding layer of a photoresistmaterial on a semiconductor substrate, the method comprising: forming atleast one exposed patterned photoresist layer on the substrate; andforming a silicon-containing polymer layer over the patternedphotoresist layer on the substrate.
 2. The method of claim 1 wherein thepatterned photoresist layer has a critical dimension of line width lessthan 100nm.
 3. The method of claim 1 wherein the patterned photoresistlayer has a critical dimension of hole width less than 100nm.
 4. Themethod of claim 1 further comprising: thermally treating the patternedphotoresist layer and the silicon-containing polymer layer to form ananti-etch shielding layer in the silicon-containing polymer layer overthe patterned photoresist layer; and removing the remainingsilicon-containing polymer layer.
 5. The method of claim 4 furthercomprising performing a plasma treatment on the anti-etch shieldinglayer and the patterned photoresist layer for increasing an etchresistance thereof.
 6. The method of claim 5 wherein the plasmatreatment is an O₂, Ar, N₂, or H₂ gas plasma treatment.
 7. The method ofclaim 1 wherein the silicon-containing polymer layer is alcohol soluble.8. A method for forming an anti-etch shielding layer of a photoresistmaterial on a semiconductor substrate, the method comprising: forming atleast one exposed patterned photoresist layer on the substrate; andforming a metal-containing polymer layer over the patterned photoresistlayer on the substrate.
 9. The method of claim 8 further comprising:thermally treating the patterned photoresist layer and themetal-containing polymer layer to form an anti-etch shielding layer inthe metal-containing polymer layer over the patterned photoresist layer;and removing the remaining metal-containing polymer layer.
 10. Themethod of claim 8 wherein the metal-containing polymer layer comprisesTi, Ta, W, Al, Cu or Co.
 11. A method for forming an anti-etch shieldinglayer of a photoresist material on a semiconductor substrate, the methodcomprising: forming at least one exposed patterned photoresist layer onthe substrate; and forming a polymer layer, which contains at least oneGroup IVA element of a chemistry periodic table, over the patternedphotoresist layer on the substrate.
 12. The method of claim 11 furthercomprising: thermally treating the patterned photoresist layer and thepolymer layer to form an anti-etch shielding layer in the polymer layerover the patterned photoresist layer; and removing the remaining polymerlayer.
 13. The method of claim 11 wherein the polymer layer comprisescarbon, carbon double bond material, carbon triple bond material orsilicon carbide.
 14. A method for forming a photoresist pattern withenhanced etch resistance on a semiconductor substrate, the methodcomprising: forming at least one exposed patterned photoresist layer onthe substrate; depositing a water soluble polymer layer over thepatterned photoresist layer on the substrate; thermally treating thepatterned photoresist layer and the water soluble polymer layer toinduce an acid diffusion from the photoresist layer to form across-linked anti-etch shielding layer between the photoresist layer andthe water soluble polymer layer; removing the water soluble polymerlayer; and performing a plasma treatment on the cross-linked anti-etchshielding layer and the photoresist layer for enhancing the etchresistance of the cross-linked anti-etch shielding layer and thephotoresist layer.
 15. The method of claim 14 wherein the plasmatreatment is an O₂, Ar, N₂, or H₂ gas plasma treatment.
 16. The methodof claim 14 wherein the water soluble polymer layer contains double-bondor triple-bond polymer.
 17. The method of claim 14 wherein the watersoluble polymer layer further includes Ti, Ta, F or Cl.
 18. The methodof claim 14 wherein the thermally treating is performed at a temperatureranged approximately from 85 to 150 degrees Celsius.
 19. The method ofclaim 14 wherein the cross-linked anti-etch shielding layer is at least10 angstroms in thickness.